Brain-like computers as brain computers. Design low-power brain computer interface with unary computing.
Design hybrid unary binary architecture to avoid overly large power in fully streaming architecture, which is usually fully parallel.
Simulate the performance of unary computing in the context of binary memory system.
We create UnarySim to simulate the functionality of unary computing in a cycle-accurate manner.
Design unary computing architecture and microarchitecture that does not introduce latency overhead in binary-unary data inter-conversion, so as to maximally overlap the computing at different stages for hardware efficiency. This category of design is usually fully parallel.