Unary Computing

Unary Computing

UW STACS LAB

A Primer

Unary computing is an emerging computing paradigm that differs from conventional binary computing. The data in binary computing have multiple parallel bits, with each of different significance. On the contrary, the data in unary computing are in the form of unary bitstreams, with each of identical significance. Those bitstreams are similar to the spikes in neuromophic computing.

According to the bitstream coding, unary bitstreams can apply either rate coding or temporal coding, which are two fundamental forms in neural coding.

  1. Rate-coded unary computing is named stochastic computing. In stochastic computing, multiplication can be performed with a simple AND gate, while addition can be executed with a single OR gate.

  2. Temporal-coded unary computing is named race logic. In race logic, an AND gate and an OR gate can perform the minimum and maximum function.

As described above, unary computing leverages extremely simple computing logic and is a promising candidate for ultra-low-power applications. Therefore, exploiting unary computing for practical real-world use is the goal here.

Projects

Hybrid Unary Binary Architecture

Design hybrid unary binary architecture to avoid overly large power in fully streaming architecture, which is usually fully parallel.

Performance Simulation for Unary Computing

Simulate the performance of unary computing in the context of binary memory system.

Functional Simulation for Unary Computing

We create UnarySim to simulate the functionality of unary computing in a cycle-accurate manner.

Fully Streaming Unary Architecture

Design unary computing architecture and microarchitecture that does not introduce latency overhead in binary-unary data inter-conversion, so as to maximally overlap the computing at different stages for hardware efficiency. This category of design is usually fully parallel.

Useful Resources